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Forum: Open Discussion 8th March 2015, 08:21 PM
Replies: 43
Views: 34,582
Posted By HatCat
No, and it wouldn't make sense if that was...

No, and it wouldn't make sense if that was possible. Traditionally vector units that permit a shuffle operand in the instruction have always seemed to apply it to the second source, not the first...
Forum: Open Discussion 20th February 2015, 11:49 PM
Replies: 43
Views: 34,582
Posted By HatCat
LOL! I know what you're saying man. For...

LOL! I know what you're saying man.

For whatever reason I was a staff at a chess website (mostly for moderating rated games/cheaters using computers to win their games for them). I kind of had a...
Forum: Open Discussion 20th February 2015, 07:07 PM
Replies: 43
Views: 34,582
Posted By HatCat
Why would SMWCentral remove it? Was there some...

Why would SMWCentral remove it? Was there some sort of legal issue involved?

Yep, LLV just has a pointer offset into the vector more-or-less.
Forum: Open Discussion 8th February 2015, 03:22 PM
Replies: 43
Views: 34,582
Posted By HatCat
ya the last 11-bit can mean different things ...

ya the last 11-bit can mean different things

For example LWC2 and SWC2 are I-type (immediate-encoded) instructions

6-bit, 5-bit, 5-bit, 16-bit imm

But how the 16-bit imm is interpreted is...
Forum: Open Discussion 7th February 2015, 06:27 PM
Replies: 43
Views: 34,582
Posted By HatCat
That is weird. Try sa 16 instead of 8 then ?...

That is weird.

Try sa 16 instead of 8 then ? (i.e. element is 8 instead of 4)


MFC2 $16, $v27[8] # r16 called "T0" on original MIPS architecture

010010 00000 10000 11011 1000- ------
Forum: Open Discussion 7th February 2015, 04:46 PM
Replies: 43
Views: 34,582
Posted By HatCat
That's MTC2. MFC is rs = 00000_2, not 00100_2. ...

That's MTC2. MFC is rs = 00000_2, not 00100_2.

And v27 should be 27 in binary...which if my math works out, 16 + 8 + 2 + 1 so 11011_2, not 01010_2.

And there is no $t0 register on the RSP. ...
Forum: Open Discussion 7th February 2015, 04:10 PM
Replies: 43
Views: 34,582
Posted By HatCat
0001 0203 0405 0607 0809 0A0B 0C0D 0E0F 127 ...

0001 0203 0405 0607 0809 0A0B 0C0D 0E0F
127 0

MFC2 $at, $v12[4]

would move

SR[1] = 0x0405
Forum: Open Discussion 7th February 2015, 02:40 PM
Replies: 43
Views: 34,582
Posted By HatCat
MFC2 is not a vector operation so it doesn't...

MFC2 is not a vector operation so it doesn't accept a vector operand specifier. It does however let you move one of a vector register's 16-bit elements, starting at the byte offset *(VR[vd] +...
Forum: Open Discussion 24th January 2015, 04:11 PM
Replies: 43
Views: 34,582
Posted By HatCat
bgez is the branch command there. I'm not...

bgez is the branch command there.
I'm not really a R4300 person, but I think if I were to check, it means branch if ($t0 >= 0).

VEQ is just for setting carry flags in one of the CP2 control...
Forum: Open Discussion 19th January 2015, 02:18 AM
Replies: 43
Views: 34,582
Posted By HatCat
Nice! Looks great. In fact the only thing I...

Nice! Looks great. In fact the only thing I could suggest is that the 'w' in 0:7[w] be optional, since strictly speaking RSP assembly language forbids it and requires just the plain digit itself. ...
Forum: Open Discussion 18th January 2015, 05:29 PM
Replies: 43
Views: 34,582
Posted By HatCat
ya that was the old way of teaching it. ...

ya that was the old way of teaching it.

anarko's n64ops was mostly just a prototype before Project64 came to fruition, which has most of the final corrections.

It came from...
Forum: Open Discussion 18th January 2015, 03:04 PM
Replies: 43
Views: 34,582
Posted By HatCat
Close, though it's a little different. In 2h's...

Close, though it's a little different.
In 2h's case I remember thinking something like--

#define N 8

typedef int16_t element;
typedef element* p_elements;
typedef...
Forum: Open Discussion 17th January 2015, 05:57 PM
Replies: 43
Views: 34,582
Posted By HatCat
I could try to go into detail, but the...

I could try to go into detail, but the explanation is probably best within the scope of RSP interpreter source.

Here:...
Forum: Open Discussion 17th January 2015, 04:03 PM
Replies: 43
Views: 34,582
Posted By HatCat
The "1" is just part of the instruction decode. ...

The "1" is just part of the instruction decode.
If you've seen R4300i COP0 decoding you may have seen an op matrix like this one I wrote in 2009:...
Forum: Open Discussion 17th January 2015, 02:44 PM
Replies: 43
Views: 34,582
Posted By HatCat
Nice! That does look like a good disassembly of...

Nice! That does look like a good disassembly of the RSP; it even highlights the illegal LDV instructions in red (unaligned addr). (They're illegal, but intended. You could also execute...
Forum: Open Discussion 16th January 2015, 04:01 PM
Replies: 43
Views: 34,582
Posted By HatCat
That's fine; I don't mind it being...

That's fine; I don't mind it being case-insensitive. My post was about "multiple" syntax's anyway, so that generally coincides.



You can get some more information about it from the new MIPS...
Forum: Open Discussion 10th January 2015, 07:07 PM
Replies: 43
Views: 34,582
Posted By HatCat
A mate of mine uses MARS [dis-]assembler for MIPS...

A mate of mine uses MARS [dis-]assembler for MIPS programming.
In that software I believe (not sure) you had to prefix register names with $.

So it would have been $zero, $at, $v0 instead of...
Forum: Open Discussion 23rd December 2014, 12:03 AM
Replies: 43
Views: 34,582
Posted By HatCat
Doesn't appear to be compliant with true MIPS...

Doesn't appear to be compliant with true MIPS syntax--at least, it's not compliant to RSP assembly language. (Tokens such as `T1', `R0' and `zero' are invalid; it has to be called `$0' in RSP asm.) ...
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